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Feeds
What's the most suitable Vivado version for Matlab 2025a
This example shows how to model, partition, and deploy a design that leverages the processor, FPGA, and AI Engines on a Versal d...
ungefär 7 timmar ago | 0
MATLAB HDL-Coder: Expression could not be reduced to a constant.
Is hwconst an input variable (creates hardware interface pins) or just a non-tuanble constant parameter passed into the design...
7 dagar ago | 0
| accepted
Troubleshooting Signal Logging in SDI for FPGA Outputs in Speedgoat Motion Control HDL I/O Blockset
Klemen, Thanks for reporting this. Our support team at Speedgoat is reviewing the issue and respond here shortly.
17 dagar ago | 1
How to resolve unsupported functions in MATLAB HDL Coder?
Happy to assist you with your MATLAB to HDL workflow. Attached is a sample zip file with the code for the attached functions (us...
18 dagar ago | 0
Error evaluating parameter. Dot indexing is not supported for variables of this type.
Can you please share your model here or reach out to tech support? The following message is not expected and a better message ne...
29 dagar ago | 0
Matlab for my needs
https://www.mathworks.com/help/hdlcoder/examples.html https://www.mathworks.com/help/hdlcoder/run-and-verify-generated-ip-cor...
ungefär en månad ago | 0
Is it possible to integrate the HDL CODE generated by simulink into an existing user-defined vivado project?
Generating an IP core wrapper for the HDL Coder generated code is the best way to integrate your algorithm into an existing vi...
ungefär 2 månader ago | 1
Ultra RAM on True Dual Port RAM
Please do attach your sample model as a test case. This is a known issue and HDL Coder R&D team have reported the issue to Viva...
ungefär 2 månader ago | 0
| accepted
Using fixed FPGA capacity for a variable number of Simulink signal channels
Have you considered tunable parameter usage in HDL Coder? https://www.mathworks.com/help/hdlcoder/ug/generate-code-for-tunable-...
2 månader ago | 0
HDL Coder "Error using find Too many input arguments."
Based on the error message this issues seems to be related to report generation infrastructure failure. The issue is resolved in...
3 månader ago | 0
Do the additional delays added by adaptive pipeline distroy the alignment between signal paths?
Please share your release. Adaptive Pipelining is an optional feature. When enabled it tries to improve timing of your design. ...
3 månader ago | 0
Deep Learning HDL Toolbox + Quartus Pro 23.3
Please check the HDL Coder supported version of Intel Quartus with R2024a and R2024b releases. https://www.mathworks.com/help/r...
4 månader ago | 0
how to download the third party support package file "xilinx linux binaries"
What version of MATLAB are you using? Please do not hesitate to reach out to tech support.
4 månader ago | 0
Seeking Guidance on Auto-Generating Verilog Code for ASIC Simulation with HDL Coder and Deep Learning HDL Toolbox
Classify ECG Signals Using DAG Network Deployed to FPGA This example shows how to classify human electrocardiogram (ECG) signal...
4 månader ago | 0
Characterisation error in HDL code generation?
This is an unexpected error. What version of MATLAB are you using? Can you share the model? Do not hesitate to reach out to te...
4 månader ago | 0
Why do I receive a privimporthdl error when importing the operator.vhd example
VHDL Import is a new feature in R2024b release. https://www.mathworks.com/help/releases/R2024b/hdlcoder/release-notes.html?star...
5 månader ago | 0
how to find abc_expected.dat file in MATLAB simulink model ?
HDL Coder generates RTL code (VHDL, Verilog, SystemVerilog) from the Design Under Test. It can also generate a RTL testbench f...
5 månader ago | 0
| accepted
Problem related to GUI deployment
In a fresh launch of MATLAB session repeat the above steps. When the error hits run the following command >> license inuse you...
5 månader ago | 0
| accepted
struct memeber can not be Simulink.Parameter?
These pages contain good info on allowed ExportedGlobal usage in HDL Coder https://www.mathworks.com/help/hdlcoder/ug/generate-...
5 månader ago | 0
generated rs code function result is not different with matlab simulink simulation
Are you using HDL Coder with this demo and not meeting timing? https://www.mathworks.com/help/wireless-hdl/ug/rsdecode.html op...
5 månader ago | 0
How to properly use hdl.RAM for Matlab to VHDL conversion?
HDL Coder generated code should match the fixed point code. I see you are using coder.hdl.pipeline which are pipeline delays and...
5 månader ago | 0
HDL Coder; Matlab Function Blocks and Clocked Processes
For a subset of MATLAB with data flow semantics you may find MATLAB Function Block (Data Path Architecture) more suitable for ...
6 månader ago | 0
zcu102: split tasks between the 4 available CPUs
https://www.mathworks.com/help/hdlcoder/ug/getting-started-with-hardware-software-codesign-workflow-for-zynq-ultrascale-mpsoc-...
6 månader ago | 0
How to generate Generic VHDL from simulink for sysgen model?
HDL Coder by default generates generic RTL. The RTL is vendor independent but target optimized. The generated RTL can be taken t...
7 månader ago | 0
Is there any method in simulink to Connect with Zynq ultrascale + MPSoC ZCU104 FPGA Board.
https://www.mathworks.com/help/hdlcoder/ug/define-and-register-custom-board-and-reference-design-for-zynq-workflow.html You c...
7 månader ago | 0
Can we design a CNN Model in simulink
You may find these topics helpful Deep Learning in Simulink https://www.mathworks.com/help/deeplearning/deep-learning-with-s...
7 månader ago | 0
| accepted
how to use Deep Learning HDL Toolbox Support Package for Xilinx FPGA and SoC Devices in MATLAB ONLINE
Deep Learning HDL Toolbox and HDL Coder products are needed for exploring the FPGA/ASIC workflow. https://www.mathworks.com/p...
7 månader ago | 0
HDL and NI FPGA code generation error.
You can generate HDL Code from the attached MATLAB function block performing RMS (root mean square) algorithm. % Generate HDL...
7 månader ago | 0
How to generate simulink model from multiple verilog codes?
importhdl - Import Verilog code and generate Simulink model - MATLAB (mathworks.com) Please note HDL Coder only supports a subs...
8 månader ago | 0
Rate Transition with a RAM Block
Can you please share your model? Thanks.
8 månader ago | 0
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