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sldvoptions

Create design verification options object

Description

example

options = sldvoptions returns an object options that contains the default values for the design verification parameters.

options = sldvoptions(model) returns the object options which references model configuration set.

Examples

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Create an options object and set several parameters.

Create an opts option for the sldvdemo_cruise_control model:

opts = sldvoptions;
opts.AutomaticStubbing = 'on';
opts.Mode = 'TestGeneration';
opts.ModelCoverageObjectives = 'MCDC';
opts.ReportIncludeGraphics = 'on';
opts.SaveHarnessModel = 'off';
opts.SaveReport = 'off';
opts.TestSuiteOptimization = 'LongTestCases';

Get the options object for the sldvdemo_cruise_control model. You can use deepCopy method if you want to create a standalone version of sldvoptions but would like to start with copy of options from the model configuration set.

openExample('sldv/CruiseControlTestGenerationExample',...
'supportingFile', 'sldvdemo_cruise_control');
optsModel = sldvoptions(bdroot);
optsCopy = optsModel.deepCopy;
optsCopy.MaxProcessTime = 120;

Input Arguments

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Name or handle to a Simulink® model, specified as a character vector or string scalar.

Output Arguments

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This table lists the parameters that comprise a Simulink Design Verifier™ options object.

Parameter

Description

Values

AbsoluteTolerance

Specify an absolute value for tolerance in relational boundary tests.

double {'1.0e-05'}

Assertions

Specify whether Assertion blocks in your model are enabled or disabled.

'EnableAll'
'DisableAll'
'UseLocalSettings' (default)

AutomaticStubbing

Specify whether the software ignores unsupported blocks and functions and proceeds with the analysis.

'on' (default)
'off'

BlockReplacement

Specify whether the software replaces blocks in a model before its analysis.

When set to 'on', this parameter enables BlockReplacementModelFileName and BlockReplacementRulesList.

'on'
'off' (default)

BlockReplacementModelFileName

Specify a folder and file name for the model that is the result after applying block replacement rules.

This parameter is enabled when BlockReplacement is set to 'on'.

character array

'$ModelName$_replacement' (default)

BlockReplacementRulesList

Specify a list of block replacement rules that execute before its analysis.

This parameter is enabled when BlockReplacement is set to 'on'.

character array

'<FactoryDefaultRules>' (default)

CodeAnalysisExtraOptions

Extra options for analyzing S-functions that have been compiled to be compatible with Simulink Design Verifier. See Support Limitations and Considerations for S-Functions and C/C++ Code.

character array

'' (default)

CoverageDataFile

Specify a folder and file name for the file that contains data about satisfied coverage objectives.

This parameter is enabled when IgnoreCovSatisfied is set to 'on'.

character array

'' (default)

CovFilter

For test generation and design error detection analysis, specify whether to ignore objectives stored in coverage filter file.

When set to on, this parameter enables CovFilterFileName.

'on'
'off' (default)

CovFilterFileName

For test generation and design error detection analysis, specify a name for the coverage filter file that contains objectives to exclude from analysis.

This parameter is enabled when CovFilter is set to 'on'.

character array

'' (default)

DataFileName

Specify a folder and file name for the MAT-file that contains the data generated during the analysis, stored in an sldvData structure.

character array

'$ModelName$_sldvdata' (default)

DesignMinMaxCheck

Specify whether to check that the intermediate and output signals in your model are within the range of specified minimum and maximum constraints.

'on'
'off' (default)

DesignMinMaxConstraints

Specify whether Simulink Design Verifier software generates test cases that consider specified minimum and maximum values as constraints for input signals in your model.

'on' (default)
'off'

DetectActiveLogic

Specify whether to analyze your model for active logic.

This parameter is enabled only if DetectDeadLogic is set to 'on'.

'on'
'off' (default)

DetectBlockInputRangeViolations

Specify whether to analyze your model for block input range violations.

For more information, see Specified block input range violations.

'on'
'off' (default)

DetectDeadLogic

Specify whether to analyze your model for dead logic.

'on'
'off' (default)

DetectDivisionByZero

Specify whether to analyze your model for division-by-zero errors.

'on' (default)
'off'

DetectDSMAccessViolations

Specify whether to analyze your model for data store access violations.

'on'
'off' (default)
DetectHISMViolationsHisl_0002

Specify whether to check the usage of rem and reciprocal operations that cause non-finite results.

'on'
'off' (default)
DetectHISMViolationsHisl_0003

Specify whether to check the usage of Square Root operations with inputs that can be negative.

'on'
'off' (default)
DetectHISMViolationsHisl_0004

Specify whether to check the usage of log and log10 operations that cause non-finite results.

'on'
'off' (default)
DetectHISMViolationsHisl_0028

Specify whether to check the usage of Reciprocal Square Root blocks with inputs that can go zero or negative.

'on'
'off' (default)

DetectInfNaN

Specify whether to analyze your model for non-finite and NaN floating-point values.

'on'
'off'(default)

DetectIntegerOverflow

Specify whether to analyze your model for integer and fixed-point data overflow errors.

'on' (default)
'off'

DetectOutOfBounds

Specify whether to analyze your model for out of bounds array access errors.

'on' (default)
'off'

DetectSubnormal

Specify whether to analyze your model for subnormal floating-point values.

'on'
'off'(default)

DisplayReport

Display the report that the Simulink Design Verifier analysis generates after completing its analysis.

This parameter is enabled when SaveReport is set to 'on'.

'on' (default)
'off'

ExistingTestFile

Specify a folder and file name for the MAT-file that contains the logged test case data.

This parameter is enabled when Mode is set to 'TestGeneration' and ExtendExistingTests is set to 'on'.

character array

'' (default)

ExtendExistingTests

Extend the Simulink Design Verifier analysis by importing test cases logged from a harness model or a closed-loop simulation model.

When set to 'on', this parameter enables ExistingTestFile and IgnoreExistTestSatisfied.

This parameter is enabled when Mode is set to 'TestGeneration'.

'on'
'off' (default)

HarnessModelFileName

Specify a folder and file name for the harness model.

This parameter is enabled when SaveHarnessModel is set to 'on'.

character array

'$ModelName$_harness' (default)

HarnessSource

Specify the type of the Inputs block for the harness model.

This parameter is enabled when SaveHarnessModel is set to 'on'.

'Signal Editor' (default)
'Signal Builder'

IgnoreCovSatisfied

Specify to analyze the model, ignoring satisfied coverage objectives, as specified in CoverageDataFile.

'on'
'off' (default)

IgnoreExistTestSatisfied

Ignore the coverage objectives satisfied by the logged test cases in ExistingTestFile.

This parameter is enabled when Mode is set to 'TestGeneration' and ExtendExistingTests is set to 'on'.

'on' (default)
'off'

IncludeRelationalBoundary

Specify generation of test cases that satisfy relational boundary objectives.
'on'
'off' (default)

MakeOutputFilesUnique

Specify whether the software makes its output file names unique by appending a numeric suffix.

'on' (default)
'off'

MaxProcessTime

Specify the maximum time (in seconds) that Simulink Design Verifier spends analyzing a model.

You can set the value of maximum analysis time to the value that you are willing to provide to the analysis. You can also stop the analysis at any time.

int32

300 (default)

MaxTestCaseSteps

Specify the maximum number of simulation steps when attempting to satisfy a test objective.

The analysis uses the MaxTestCaseSteps parameter during certain parts of the test generation analysis to bound the number of steps that test generation uses. When you set a small value for this parameter, the parts of the analysis that are bounded completes in less time. When you set a larger value, the bounded parts of the analysis take longer, but it is possible for these parts of the analysis to generate longer test cases.

To achieve the best performance, set the MaxTestCaseSteps parameter to a value large enough to bound the longest required test case, even if the test cases that are ultimately generated are longer than this value.

When you set the TestSuiteOptimization parameter to 'LongTestCases', the analysis uses successive passes of test generation to extend a potential test case so that it satisfies more objectives. The analysis applies the MaxTestCaseSteps parameter to each individual iteration of test generation.

This parameter is enabled when Mode is set to 'TestGeneration'.

int32

10000 (default)

MaxViolationSteps

Specify the maximum number of simulation steps over which the software searches for property violations.

This parameter is enabled whenMode is set to 'PropertyProving' and when ProvingStrategy is set to 'FindViolation' or 'ProveWithViolationDetection'.

int32

20 (default)

Mode

Specify the analysis mode.

'TestGeneration' (default)
'PropertyProving'
'DesignErrorDetection'

ModelCoverageObjectives

Specify the type of model coverage to achieve.

When ModelCoverageObjectives is set to 'MCDC', the Simulink Design Verifier software enables every coverage objective for decision coverage and condition coverage. Enabling coverage for condition coverage causes every decision and condition coverage outcome to be enabled.

This parameter is enabled when Mode is set to 'TestGeneration'.

'None'
'Decision'
'ConditionDecision' (default)
'MCDC'
'EnhancedMCDC'

ModelReferenceHarness

Use a Model block to reference the model to run in the harness model.

'on'
'off' (default)

OutputDir

Specify a path name to which the Simulink Design Verifier software writes its output.

character array

'sldv_output/$ModelName$' (default)

ParameterConfiguration

Specify how to configure parameters during Simulink Design Verifier analysis.

'None'(default)
'Auto'
'DetermineFromGeneratedCode'
'UseParameterTable'
'UseParameterConfigFile'

ParametersConfigFileName

Specify a MATLAB® function that defines parameter configurations for a model.

This parameter is enabled when Parameters is set to 'on'. This parameter is disabled when ParametersUseConfig is set to 'on'.

character array

'sldv_params_template.m' (default)

ProofAssumptions

Specify whether Proof Assumption blocks in your model are enabled or disabled.

'EnableAll'
'DisableAll'
'UseLocalSettings' (default)

ProvingStrategy

Specify the strategy for proving properties.

'FindViolation'
'Prove' (default)
'ProveWithViolationDetection'

RandomizeNoEffectData

Specify whether to use random values instead of zeros for input signals that have no impact on test or proof objectives.

'on'
'off' (default)

RebuildModelRepresentation

Specify whether to rebuild the model representation for Simulink Design Verifier analysis.

'Always'
'IfChangeIsDetected' (default)

ReduceRationalApprox

Specify whether to run additional analysis to reduce instances of rational approximation.

'on' (default)
'off'

RelativeTolerance

Specify a relative value for tolerance to be used in relational boundary tests.

double {'0.01'}

ReportFileName

Specify a folder and file name for the analysis report.

This parameter is enabled when SaveReport is set to 'on'.

character array

'$ModelName$_report' (default)

ReportIncludeGraphics

Includes screen shots of properties in the report. Valid only in property-proving mode.

This parameter is enabled when SaveReport is set to 'on' and Mode is set to 'PropertyProving'.

'on'
'off' (default)

SaveExpectedOutput

Simulate the model by using test case signals and include the output values in the Simulink Design Verifier data file.

'on'
'off' (default)

SaveHarnessModel

Create a harness model generated by the Simulink Design Verifier analysis.

When SaveReport is set to 'on', this parameter must also be set to 'on'.

When set to 'on', this parameter enables HarnessModelFileName.

'on'
'off' (default)

SaveReport

Generate and save a Simulink Design Verifier report.

When this parameter is set to 'on', SaveHarnessModel must also be set to 'on'.

When set to 'on', this parameter enables ReportFileName, ReportIncludeGraphics, and DisplayReport.

'on'
'off' (default)

SFcnSupport

Enable support for S-functions that have been compiled to be compatible with Simulink Design Verifier. See Support Limitations and Considerations for S-Functions and C/C++ Code.

'on' (default)
'off'

StrictEnhancedMCDC

Specify whether to use strict propagation conditions for enhanced MCDC analysis.

This parameter is enabled when Mode is set to 'TestGeneration' and ModelCoverageObjectives is set to 'EnhancedMCDC'.

'on'
'off' (default)

TestConditions

Specify whether Test Condition blocks in your model are enabled or disabled.

This parameter is enabled when Mode is set to 'TestGeneration'.

'EnableAll'
'DisableAll'
'UseLocalSettings' (default)

TestgenTarget

Specify the test generation target as model, code generated as top model, or code generated as model reference.

character array

'Model' (default)

'GenCodeTopModel'

'GenCodeModelRef'

TestObjectives

Specify whether Test Objective blocks in your model are enabled or disabled.

This parameter is enabled when Mode is set to 'TestGeneration'.

'EnableAll'
'DisableAll'
'UseLocalSettings' (default)

TestSuiteOptimization

Specify the optimization strategy to use when generating test cases.

This parameter is enabled when Mode is set to 'TestGeneration'.

If you analyze your model by using the LargeModel (Nonlinear Extended), the software displays a warning message that this option has been removed and suggests that you use Auto instead.

'Auto' (default)
'IndividualObjectives'
'LongTestCases'
'LargeModel (Nonlinear Extended)'

UseParallel

Specify whether to validate test cases or counterexamples with parallel computing. This option requires a Parallel Computing Toolbox™ license.

'on'
'off' (default)

Alternatives

To set the analysis options, on the Design Verifier tab, in the Prepare section, from the drop-down menu for the mode settings, click Settings.

Version History

Introduced in R2007a