MATLAB AXI master has been renamed to AXI manager. In the software and documentation, the terms "manager" and "subordinate" replace "master" and "slave," respectively.
Access on-board memory locations from MATLAB or Simulink by using the AXI manager IP in your FPGA design. This IP connects to subordinate memory locations on the board. The IP also responds to read and write commands from MATLAB or Simulink, over JTAG, PCI Express®, or Ethernet cable.
You can also access on-board memory locations from MATLAB over a USB Ethernet interface.
|Add AXI manager IP path to Vivado project
|Read data out of AXI4 memory-mapped subordinates
|Write data to AXI4 memory-mapped subordinates
|Release JTAG or Ethernet cable resource
|Copy board-specific SD card image files to host SD card location
|Load board-specific SD card image files to target SoC device SD card location (Since R2020a)
|Load custom FPGA bitstream and corresponding DTB file to target SoC device
|Read and write memory locations on FPGA board from MATLAB
- Set Up AXI Manager
High-level steps for accessing memory-mapped locations on an FPGA board from MATLAB or Simulink.
- JTAG AXI Manager
Integrate and configure JTAG AXI manager.
- Ethernet AXI Manager
Integrate and configure Ethernet AXI manager.
- Ethernet AXI Manager for Xilinx Zynq SoC Devices
Configure Ethernet AXI manager for Xilinx Zynq SoC devices.
- PCI Express AXI Manager
Integrate and configure AXI manager IP over PCI Express.
- USB Ethernet AXI Manager
Run AXI manager over USB Ethernet interface.
- Use Simulink to Access FPGA Locations
Access memory-mapped locations on an FPGA board from Simulink.
- AXI Manager Simulation
Simulate AXI manager using the Vivado simulator.