## Simscape HDL Workflow Advisor Tasks

By using the Simscape HDL Workflow Advisor, you can generate an HDL implementation model.
You can then generate HDL code for the implementation model and deploy the code onto FPGA
platforms. To open the Advisor, run the `sschdladvisor`

function. For example:

```
sschdladvisor('sschdlexHalfWaveRectifierExample')
```

In the Simscape HDL Workflow Advisor, for summary information on each Simscape HDL
Workflow Advisor folder or task, right-click that folder or task and select **What's
This?**.

### Simscape HDL Workflow Advisor folder

The Simscape HDL Workflow Advisor consists of various tasks that you can use to convert your Simscape™ model to an HDL implementation model. You can generate code for the HDL Subsystem in this model. The Simscape HDL Workflow Advisor consists of folders that perform these tasks:

The

**Code generation compatibility**folder consists of tasks that check whether the model is a switched linear system and uses the correct solver configuration settings.The

**State-space conversion**folder consists of tasks that derive the state-space parameters from your model for generating the implementation model.The

**Implementation model generation**folder consists of a task that generates the HDL implementation model from the state-space parameters.

To learn more about each folder or task, right-click that folder or task, and select
**What's This?**.

### Code generation compatibility folder

The tasks in the **Code generation compatibility** folder check whether:

You have correctly specified the solver configuration settings and the settings are consistent across Solver Configuration blocks inside each network into your Simscape model.

Your model uses switched linear blocks.

### Check solver configuration task

The **Check solver configuration** task checks whether you have
specified the correct settings and the settings are
consistent across Solver Configuration (Simscape) blocks inside each
network in your Simscape model.

The Advisor checks whether you specified these settings for all Solver Configuration blocks:

**Use local solver**is selected**Solver type**is set to`Backward Euler`

A discrete sample time,

`Ts`

is specified**Use fixed-cost runtime consistency iterations**is either selected or cleared**Nonlinear iterations**value is the same when**Use fixed-cost runtime consistency iterations**is selected

If you did not specify these settings, the task provides a link to the Solver Configuration block in your model and the settings to modify.

### Check switched linear task

The **Check switched linear** task checks whether you use switched
linear blocks in your Simscape model.

For this task to pass, the model that you use must contain linear or switched linear blocks. Nonlinear blocks and time-varying blocks (such as Variable Inductor and Variable Capacitor blocks) are not supported.

Linear blocks are blocks that are defined by a linear relationship. For example, a
resistor is a linear block since it is defined by the equation `V = IR`

.
Similarly, an inductor is linear because it is defined by `V = d/dt I L`

.
Switched linear blocks are blocks such as diodes or switches. These blocks are defined by a
linear relationship such as `V = IR`

where `R`

can switch
between two or more values depending on the state of the diodes or switches.

This task runs `simscape.findNonlinearBlocks`

(Simscape) on your model
to check for the presence of nonlinear blocks. For
example:

```
sschdladvisor('sschdlexHalfWaveRectifierExample')
```

**Result**log, you see links provided to the nonlinear blocks in your model. To continue the workflow, replace the nonlinear blocks with switched linear blocks, and rerun the task.

When this task passes, it displays:

A message indicating that the model is switched linear.

Number of Simscape networks present in the model.

The number of algebraic and differential variables for each Simscape network with links to the blocks in your Simscape model that are related to these variables.

Differential variables consume a quadratic amount of multiplier resources on the target FPGA device. Algebraic variables consume a linear amount of multiplier resources. You can use this information to determine how many multiplier resources your Simscape design consumes on the FPGA device.

A message with links to the Simulink-PS Converter (Simscape) and PS-Simulink Converter (Simscape) blocks in your model if you use the default names for these blocks.

The input and output ports of the

`HDL Subsystem`

in the implementation model use the names that you specify for the Simulink-PS Converter and PS-Simulink Converter blocks. To avoid this message, use a meaningful name for these blocks.

### State-space conversion folder

Before you can generate the HDL implementation model, run the task in this folder to derive the state-space parameters from your model. The tasks in this model:

Simulate the Simscape model to extract the differential algebraic equations.

Discretize the differential algebraic equations to generate an abstract state space representation that represents the model in the form of linear modes.

### Extract Equations

The **Extract Equations** task simulates your Simscape model to extract the differential algebraic equations. This task derives the
**Simulation stop time** value from the original Simscape model.

If this task passes, it displays the number of states, inputs, outputs, modes, and differential variables for each Simscape network present in the model. The task also displays a message if the model is purely linear and does not contain any nonlinear elements.

The number of modes is limited by the number of switches present in your Simscape model. The maximum number of modes possible are ```
2^(number of
switches)
```

. All the modes that the Advisor
generates are executed as per the input parameters by using a switching logic. A valid
number of modes are selected depending on the design of your Simscape model.

### Discretize Equations

This task discretizes the differential algebraic equations and generates an abstract
discrete state-space representation. This task represents the model in the form of linear
modes. Each mode is represented by a set of state-space matrices. This task derives the
**Discrete sample time** value from the original Simscape model.

If this task passes, it displays the **Discrete sample time** and
number of parameters and modes for each Simscape network present in the model.

### Implementation model generation folder

The task in the **Implementation model generation** folder generates an
HDL implementation model from the discrete state-space representation. The implementation
model represents the Simscape algorithm by using Simulink^{®} blocks that are compatible for HDL code generation. If the task
**Generate implementation model** in this folder passes, it provides a
link to the implementation model.

### Generate implementation model task

To generate an HDL implementation model from the discrete state-space representation,
run this task. The HDL implementation model contains a `HDL Subsystem`

that
models the state-space equations by using the state-space parameters derived by running the
**Get state-space parameters** task. The `HDL Subsystem`

block represents the DUT for which you can generate HDL code.

Before you run this task, you can:

Specify a custom value for the

**Number of Solver iterations**setting. To learn more, see Using Number of Solver Iterations.Use the

**Floating-point precision**setting to specify whether the`HDL Subsystem`

in the generated implementation model stores matrix types in`single`

or`double`

and computes the results in`single`

or`double`

data types. To learn more, see Floating-Point Precision and Numerical Accuracy.Use the

**Generate validation logic for the implementation model**to generate the logic that verifies whether the generated HDL implementation model is functionally equivalent to the original Simscape model. The logic is generated for each Simscape network present in the model. You can specify a tolerance for the numerical correctness by using the**Validation logic tolerance**. The**Validation logic tolerance**is an absolute value. For example, you can specify a tolerance value of`1e-12`

.

If the task passes, you see a link to the implementation model.