Simulink Blocks Supported by Using Native Floating Point

HDL Coder™ native floating point can generate target-independent HDL code from your floating-point design. You can synthesize your floating-point design on any generic FPGA or ASIC. Floating-point designs have better precision, higher dynamic range, and a shorter development cycle than fixed-point designs. If your design has complex math and trigonometric operations, use native floating-point technology.

HDL Coder supports several Simulink^® blocks, including math and trigonometric blocks by using native floating-point technology.

HDL Floating Point Operations Library

In the HDL Floating Point Operations library, HDL Coder supports blocks that have single and double data types in the Native Floating Point mode. For certain blocks, such as Discrete-Time Integrator and Discrete PID Controller, use zero latency strategy.

When you use half types, these blocks are supported in Native Floating Point mode.

• Add

• Bus to Vector

• Divide

• Dot Product

• Float Typecast

• Gain

• Logical Operator

• Multiply-Add

• Probe

• Product

• Product of Elements

• Reciprocal

• Relational Operator

• Subtract

• Sum of Elements

• Signal Conversion

• Terminator

• Transpose

• Unary Minus

Supported Simulink Blocks in Math Operations Library

In the Math Operations library, these blocks are supported for HDL code generation:

Block Name	Supported by Half Data Types	Supported by Single Data Types	Supported by Double Data types	Complex Data Support	Remarks
Abs	Yes	Yes	Yes	Yes	Not Applicable
Add	Yes	Yes	Yes	Yes	Not applicable
Assignment	No	Yes	Yes	Yes	Not applicable
Bias	No	Yes	Yes	Yes	Not applicable
Complex to Real-Imag	No	Yes	Yes	Yes	Not applicable
Divide	Yes	Yes	Yes	No	Not applicable
Dot Product	Yes	Yes	Yes	No	Not applicable
Gain	Yes	Yes	Yes	Yes	Not applicable
MinMax	No	Yes	Yes	No	Not applicable
Multiply-Add	Yes	Yes	Yes	Yes	Not applicable
Product	Yes	Yes	Yes	Yes	If you configure the block to perform matrix multiplication by setting the Multiplication block parameter to Matrix(*), the DotProductStrategy must be set to Fully Parallel.
Product of Elements	Yes	Yes	Yes	Yes	Not applicable
Real-Imag to Complex	No	Yes	Yes	No	Not applicable
Reciprocal Sqrt	No	Yes	Yes	No	Not applicable
Reshape	Yes	Yes	Yes	Yes	Not applicable
Sqrt	No	Yes	Yes	No	Not applicable
Subtract	Yes	Yes	Yes	Yes	Not applicable
Sum	Yes	Yes	Yes	Yes	Not applicable
Sum of Elements	Yes	Yes	Yes	Yes	Not applicable
Trigonometric Function	No	Yes	No	No	Not applicable
Unary Minus	Yes	Yes	Yes	Yes	Not applicable
Vector Concatenate, Matrix Concatenate	Yes	Yes	Yes	Yes	Not applicable

Supported Functions in Math Function Block

In the Math Function block, these functions are supported for HDL code generation:

Math Functions	Supported Floating-Point Datatypes			Complex Data Support
	Half	Single	Double
exp	No	Yes	No	No
log	No	Yes	Yes	No
10^u	No	Yes	No	No
log10	No	Yes	No	No
magnitude^2	No	Yes	Yes	Yes
square	No	Yes	No	Yes
pow	No	Yes	No	No
conj	No	Yes	No	Yes
reciprocal	Yes	Yes	Yes	No
hypot	No	Yes	No	No
rem	No	Yes	No	No
mod	No	Yes	No	No
transpose	Yes	Yes	Yes	Yes
hermitian	No	Yes	No	Yes

Supported Simulink Blocks in Other Libraries

The table shows the list of supported blocks for HDL code generation in other HDL Coder block libraries.

Block Library	Supported by Half Data Types	Supported by Single Data Types	Supported by Double Data Types
Discrete	The supported blocks include the set of delay blocks including the synchronous blocks, and Integer Delay, and Tapped Delay.	The supported blocks include: Zero Order Hold Set of delay blocks including the synchronous blocks, and Integer Delay, and Tapped Delay.	The supported blocks include: Zero Order Hold Set of delay blocks including the synchronous blocks, and Integer Delay, and Tapped Delay.
HDL Operations	Blocks in this library are not supported.	All blocks are supported.	All blocks are supported.
HDL RAMs	Blocks in this library are not supported.	All blocks are supported.	All blocks are supported.
HDL Subsystems	All blocks are supported.	All blocks are supported.	All blocks are supported.
Logic and Bit Operations	Supported blocks include: Compare to Constant Relational Operator Logical Operator Detect Change Detect Increase Detect Decrease	All blocks are supported.	All blocks are supported.
Lookup Tables	Blocks in this library are not supported.	All blocks are supported.	All blocks are supported.
Model Verification	Blocks in this library are not supported.	All blocks are supported.	All blocks are supported.
Model-Wide Utilities	Blocks in this library are not supported.	All blocks are supported.	All blocks are supported.
Ports & Subsystems	Enable, reset, input, and output ports, model references, and subsystem blocks are supported.	Enable, reset, input, and output ports, model references, and subsystem blocks are supported.	Enable, reset, input, and output ports, model references, and subsystem blocks are supported.
Signal Attributes	Supported blocks include: Data Type Conversion Data Type Duplicate Rate Transition Signal Specification Signal Conversion Bus to Vector Probe	All blocks are supported.	All blocks are supported.
Signal Routing	All blocks are supported.	All blocks are supported.	All blocks are supported.
Sources	The supported blocks include Inport, Constant, and Ground blocks.	The supported blocks include Inport, Constant, and Ground blocks.	The supported blocks include Inport, Constant, and Ground blocks.
Sinks	All blocks are supported.	All blocks are supported.	All blocks are supported.
User-Defined Functions	MATLAB Function blocks are supported.	MATLAB Function blocks are supported.	MATLAB Function blocks are supported.

Simulink Block Restrictions

In native floating-point mode, the code generator does not support these blocks or block architectures:

• Dot Product in complex mode with Architecture as Tree or Linear.

• Dead Zone and Dead Zone Dynamic.

• Polar to Cartesian.

• For the Data Type Conversion block:

  • Stored Integer (SI) mode for Input and output to have equal setting is not supported.

  • The Saturate on integer overflow check box must be left cleared.