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Generate HDL Code for Nonlinear Simscape Models by Using Partitioning Solver

This example shows how to generate HDL code for a nonlinear Simscape™ model by using the Partitioning solver. You can then deploy the generated HDL code onto a Speedgoat® FPGA I/O module.


In this example, you learn how you can convert the Simscape™ three-phase permanent magnet synchronous motor (PMSM) model to an HDL implementation model by using the Simscape HDL Workflow Advisor. PMSM is a nonlinear block in the model that uses Partitioning solver. The Partitioning solver converts the entire system of equations for the Simscape network into several smaller sets of switched linear equations that are connected through nonlinear functions. By using this solver, you can run the Simscape HDL Workflow Advisor without having to remove nonlinear blocks in your model or replacing them with the corresponding Simulink blocks. For more information, see Understanding How the Partitioning Solver Works (Simscape). You can then generate HDL code and deploy the code to Speedgoat® FPGA I/O modules.

Permanent Magnet Synchronous Motor Model

The PMSM model is a physical system in Simscape™. This model uses field-oriented control (FOC) to control the speed of a three-phase permanent magnet synchronous motor (PMSM). The model contains a PMSM and a three-phase inverter that you can use in a typical hybrid vehicle. The inverter is connected to the battery.

To open the model, in the MATLAB® command prompt, enter:

ModelName = 'sschdlexPMSMPartitioningSolver';
set_param(ModelName, 'SimulationCommand', 'update');

To see how the model works, simulate the model.

open_system([ModelName '/Scope'])

Configure the Simscape Model for HDL compatibility by using the hdlsetup function:


Setup and Configuration

To support the deployment of nonlinear models, choose the Solver type as Partitioning and a Sample time Ts. You can select a Partition method from the drop-down list. Select whether to prioritize speed or robustness when using the Partitioning solver. For more information, see Solver Configuration (Simscape). To show the functionality of the PMSM model, the default Solver Configuration settings are:

  • Solver type: Partitioning

  • Sample time: Ts

  • Partitioning method: Robust simulation

In the model window, you can view the model statistics. Select the Debug tab and click Simscape > Statistics Viewer. This opens the Simscape Statistics window for sschdlexPMSMPartitioningSolver model. Alternatively, you can click the Model Statistics link generated when the Check model compatibility task passes in the Simscape HDL Workflow Advisor. You can see that the solver divides the system into three partitions. The first partition is solved by using the Forward Euler method. The other two partitions are solved by using the Backward Euler method. Expand the Number of partitions node. Click each of the partitions to get a detailed description.

Generate HDL Implementation Model

The Simscape HDL Workflow Advisor converts the Simscape plant model to an HDL-compatible implementation model from which you generate HDL code. The PMSM block is a nonlinear block for which you generate HDL-compatible implementation model. To generate the HDL implementation model:

1. Open the Simscape HDL Workflow Advisor:


2. To generate the HDL implementation model, in the Implementation model generation task drop-down list, right-click the Generate implementation model task, and then select Run to Selected Task from the list.

After the task passes, you see a link to the HDL implementation model gmStateSpaceHDL_sschdlexPMSMPartitioningSol.

See also Simscape HDL Workflow Advisor Tasks.

When you run the Extract discrete equations task, the task displays the number of modes, states, clumps, and the state-space representation for the Simscape network in the right pane.

Generate HDL Code

Save the parameters for HDL implementation model.


Enable generation of the resource utilization report.

hdlset_param('gmStateSpaceHDL_sschdlexPMSMPartitioningSol', 'ResourceReport', 'on')

Generate HDL code for the implementation model.

makehdl('gmStateSpaceHDL_sschdlexPMSMPartitioningSol/HDL Subsystem');

When you generate code, HDL Coder creates a code generation report. The resource utilization report in the High-level Resource Report indicates the amount of adders, multipliers, and registers that might be consumed on the target FPGA device.

Deploy Permanent Magnet Synchronous Motor to Speedgoat FPGA I/O Modules

In the HDL implementation model, the HDL Subsystem contains blocks you run on the FPGA. You can run the HDL Workflow Advisor on this Subsystem to deploy the HDL algorithm onto FPGA boards in Speedgoat target computers. For an example, see Hardware-in-the-Loop Implementation of Simscape Model on Speedgoat FPGA I/O Modules.

See Also


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