From the series: Developing Radio Applications for RFSoC with MATLAB & Simulink
Tom Mealey, MathWorks
System specifications for a range-Doppler radar are the driver for hardware/software implementation decisions when targeting SoC architectures like Xilinx® RFSoC devices.
In this second video in the series, see how specifications like peak bandwidth, range, and pulse rates serve as the basis for making implementation designs.
Review the process of frequency planning, which includes setting parameters such as intermediate frequency (IF), sampling rate (Fs), NCO mixer frequency, decimation/interpolation factor, and FPGA clock rate. Find out how to use simulation in Simulink® to validate the RF-ADC digital down conversation chain. Once the DDC chain is validated, learn how you can use the simulation of the complete system—with models of radar targets, range-Doppler radar processing, and detection—to determine whether targets are being detected. The resulting behavioral simulation model serves as the basis for hardware/software partitioning in Part 3 of this video series.
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