DSP HDL Toolbox


DSP HDL Toolbox

Design digital signal processing applications for FPGAs, ASICs, and SoCs

DSP HDL Blocks

Choose from a range of hardware-verified optimized library blocks to implement DSP filters and transforms on hardware.

High-Throughput Algorithms

Explore throughput options at gigasample-per-second (GSPS) rates by simply changing input data parallelism and specifying a supported architecture.

Design Tradeoff Exploration

Explore serial and parallel options for design tradeoffs such as power, throughput, and resource usage for various configurable architecture choices using built-in block parameters.

Reference Applications

Model, simulate, and deploy radar, wireless, and other real-world applications requiring high-speed processing on FPGAs and SoCs.

DSP Algorithm Prototyping on FPGAs, ASICs, and SoCs

Use hardware-proven blocks together with HDL Coder to speed development of applications ready for prototyping on any FPGA platform.

Verification of HDL Designs via Cosimulation

With HDL Verifier, verify your generated HDL running in a supported EDA simulator or on an FPGA development kit, connected to your MATLAB or Simulink test environment.

Interested in DSP HDL Toolbox?