Answered
Sampling rate conversion issues in HDL coder
See attached QPSK Tx, Rx example that works with HDL Coder. You can read through instructions in QPSKTxRxHDLExample.m on how to...

4 månader ago | 0

Answered
instrumented MEX function...and HDL code...
The original question is related to floating point to fixed point conversion in MALTAB and is now resolved. The followups respon...

4 månader ago | 0

Answered
Simulink HDL coder Results compare
If you continue to face the issue please search for Gain block related HDL Coder bug fix by your release here. https://www.math...

4 månader ago | 0

Answered
HDL Coder black box inclusion of module with parameterised packed input
>> I considered just using the Bit Concat block and then using the Extract Bits block within the model of the black box, but tha...

4 månader ago | 0

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About HDL simulink coder for StateFlow
Attached model describes how to model either edge in Stateflow suitable for HDL code generation. HDL Verision Result C...

4 månader ago | 0

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Fixed point to float point conversion of 16 point ifft
See attached example for additional modeling guidelines for MATLAB to HDL.

4 månader ago | 0

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Error creading HDL from subsystem
This is a model compilation issue and not HDL Code generation issue. Press ctrl-d or compile the model and make sure there are n...

4 månader ago | 0

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HDL Coder: Fails to generate high-level timing support
You have encountered a bug in critical path estimation. However there are no active records with the signature currently active ...

4 månader ago | 0

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Create matrix 64x64 that supported by HDL coder
Performing Large Matrix Operation on FPGA web(fullfile(docroot, 'hdlcoder/ug/performing-large-matrix-operation-on-fpga-using-e...

4 månader ago | 0

Answered
Define global constant for HDL Coder
Globals are not currently supported in HDL Coder. Use persistent variables instead. Also see this example on how to >> mlhdlc...

4 månader ago | 0

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RAM-based shift register in HDL coder
UseRAM parameter: The UseRAM implementation parameter in Simulink HDL block option enables using RAM-based mapping for an intege...

4 månader ago | 0

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Implement Reset in Simulink
These page describes how to generate code with synchronous or asynchronous reset. web(fullfile(docroot, 'hdlcoder/ug/reset-and-...

4 månader ago | 0

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I want to convert the following code to verilog using hdl coder, please help
The above MATLAB example is poorly written to be taken to HDL code generation. First divide your code into design (DUT) and tes...

4 månader ago | 0

Answered
I can't find QPSK timing recovery model example built with Simulink® and Xilinx System Generator for DSP™
This is a Xilinx System Generator support question. Please contact xilinx. https://www.xilinx.com/products/design-tools/vivado/...

4 månader ago | 0

Answered
SoC Blockset Support Package for Xilinx Devices Installation Error
If you cotinue to have this issue, please reach out to install support team support@mathworks.com

4 månader ago | 0

| accepted

Answered
simulink_hdl_coder says unable to check out license, even though the tool has that license checked-out
We are not aware of such license checkout issue. Please reach out to support@mathworks.com if you continue to face issues and ...

4 månader ago | 0

Answered
hdl coder ram usage and source optimizaion
https://www.mathworks.com/matlabcentral/fileexchange/58941-hdl-coder-evaluation-reference-guide Refer to Block RAM mapping guid...

4 månader ago | 0

| accepted

Answered
DE-10 Nano development kit
Board and Reference Design Registration System System for defining and registering boards and reference designs. Register a Cu...

4 månader ago | 1

Answered
Error when I click on build model in SIMULINK
This seems to be Xilinx ISE synthesis tool installation issue; please check your installation and contact Xilinx customer suppor...

4 månader ago | 0

Answered
Error in simulnk: Action types are not supported
This question has two parts: Does HDL Coder currently support "Fuzzy Logic Controller"? Does HDL Coder support "If" Action su...

4 månader ago | 0

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How to do speed optimizations with/in feedback Loops? -Simulink HDL Coder
To address pipelining of blocks in feedback loops you can refer to this example and related HDL Coder features. https://www.mat...

5 månader ago | 0

Answered
timing loops found by synthesis tool when using sqrt function block in hdl coder
This is now fully resolved in R2020b release. Sqrt operation is fully pipelined and several custom latency options for a range o...

5 månader ago | 1

Answered
HDLコード変換した演算ブロックの動作について
(Translation) When HDL code is generated for a Simulink model in HDL Coder (native floating point mode) It seems that the code ...

5 månader ago | 0

Answered
Is there something like code replacement when using HDL Coder?
The simplest approach for incorporating external IP into your HDL Coder Design is to create a black box interface for a subs...

5 månader ago | 0

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How to use genetic xilinx platform in HDL coder.
To support any new board, you need to build a custom reference design. https://www.mathworks.com/help/supportpkg/xilinxzynq7000...

5 månader ago | 0

Answered
Matlab to vhdl conversion
HDL Coder supports a single entry point called DUT from which VHDL/Verilog is generated. Consider making one top level dut.m f...

5 månader ago | 0

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Importhdl function model generation failed. Assertion failed
If the issue is still reproducible in R2020b please share the sample verilog module.

5 månader ago | 0

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HDL coder random generator
Please see the suggestion in this post.

5 månader ago | 0

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HDL Coder: How to multiply floating point numbers in a stateflow project?
HDL Coder does not support Stateflow models with floating-point Math in actions. Please consider using MATLAB Function block wit...

5 månader ago | 0

Answered
How can I convert my Matlab code of Image Fusion into vhdl code and then dump it into fpga kit
Please check this example for the workflow using HDL Coder. https://www.mathworks.com/help/hdlcoder/ug/image-enhancement-by-his...

5 månader ago | 0

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