Target NI USRP Radios
Prototype and test SDR algorithms on NI™
USRP™ radio hardware
Deploy custom software-defined radio (SDR) algorithms on the FPGA of an NI USRP radio using a Simulink® workflow. Run and verify your design using MATLAB® objects and functions.
Objects
usrp | Control NI USRP radio device (Since R2024a) |
fpga | Access DUT on the FPGA of an NI USRP radio device (Since R2024a) |
hdlcoder.DUTPort | DUT port from an HDL Coder generated IP core, saved as an object array (Since R2020b) |
Functions
programFPGA | Program FPGA on NI USRP radio device with custom bitstream (Since R2024a) |
describeFPGA | Describe hardware interfaces on NI USRP radio device FPGA (Since R2024a) |
capture | Retrieve captured IQ data from an NI USRP radio device (Since R2024a) |
transmit | Transmit waveform over the air with an NI USRP radio device (Since R2024a) |
stopTransmission | Stop transmission from an NI USRP radio device (Since R2024a) |
mapPort | Map DUT port to RFNoC interface (Since R2024a) |
readPort | Read output data from DUT port (Since R2024a) |
writePort | Write input data to DUT port (Since R2024a) |
addRFNoCRegisterInterface | Add RFNoC register interface to your DUT (Since R2024a) |
addRFNoCStreamInterface | Add RFNoC streaming interface to your DUT (Since R2024a) |
release | Release the hardware resources associated with
fpga object (Since R2024a) |
Topics
- Installation for Targeting NI USRP Radios
Install and configure additional support packages and third-party tools.
- Target NI USRP Radios Workflow
Prototype and deploy SDR algorithms on the FPGA of an NI USRP radio.
- STEP 1: Verify Radio Connection
- STEP 2: Set Up Third-Party Tools
- STEP 3: Prepare Hardware Model for Deployment
- STEP 4: Generate HDL Code
- STEP 5: Generate Bitstream and Program FPGA
- STEP 6: Run and Verify Hardware Implementation
- Supported Radio Devices
Determine which NI USRP radios you can target with Wireless Testbench™.
- System Requirements
Determine the host system requirements for targeting NI USRP radios.