Speed and Area Optimization
Improvements through resource sharing, streaming, pipelining, RAM mapping
Functions
coder.hdl.loopspec | Unroll or stream loops in generated HDL and SystemC code |
coder.hdl.pipeline | Insert pipeline registers at output of MATLAB expression |
Topics
Optimization Basics
- Speed and Area Optimizations in HDL Coder
Learn about various speed and area optimizations and how to optimize your design. - Specify the Clock Enable Rate
Configure clock enable to run at design base rate or input data rate. - Minimize Clock Enables
Generate code for registers without clock enables. - Constant Multiplier Optimization
What is Constant multiplier optimization and how to specify this optimization.
Area Optimization
- Map Persistent Arrays and dsp.Delay to RAM
In the HDL Workflow Advisor, select MATLAB to HDL Workflow > Code Generation > Optimizations tab. - Map Matrices to ROM
To map a matrix constant to ROM:If your MATLAB® code meets these requirements, HDL Coder™ inserts a no-reset register at the output of the matrix in the generated code. - RAM Mapping for MATLAB Code
RAM mapping is an area optimization that maps storage and delay elements in your MATLAB code to RAM. - RAM Mapping Comparison for MATLAB Code
hdl.RAM
,dsp.Delay
, persistent array variables, and user-defined System object™ private properties can map to RAM, but have different attributes.
Speed Optimization
- Pipelining MATLAB Code
Pipelining helps achieve a higher maximum clock rate by inserting registers at strategic points in the hardware to break the critical path. - Pipeline MATLAB Expressions
Insert registers at output of MATLAB expression. - Optimize MATLAB Loops
Optimize loops for area or speed. - Distributed Pipelining
Distributed pipelining definition, benefits, and costs.