Wireless System Design Using FPGA/SoCs: Faculty Development Program
Ahmedabad, Gujarat, India
| Venue | Start Date | End Date |
|---|---|---|
| Adani University, Ahmedabad | 12 Aug 2026, 09:00 IST | 14 Aug 2026, 17:00 IST |
Overview
The rapid expansion of wireless communication technologies from 5G/6G networks to advanced IoT and edge‑processing systems demands engineers who can translate communication algorithms into efficient real‑time hardware. FPGAs, combined with the high‑level design capabilities of MATLAB and Simulink, offer a powerful platform for developing, testing, and deploying wireless systems with exceptional flexibility and performance.
MathWorks, SAC ISRO and Adani University would like to invite Faculty members for a 3‑day in-person Faculty Development Program (FDP) that provides participants with an end‑to‑end workflow for wireless system design using MATLAB and Simulink, and FPGA implementation tools.
Through technical sessions, hands‑on labs, and expert talks, attendees will explore wireless algorithms, hardware‑centric modelling, HDL code generation, and real‑time verification using industry‑standard design practices.
Registration is Free. However, seats are limited, participants who register are required to attend all the 3-days.
We encourage you to make the most of this opportunity.
So why wait? Register now and secure your spot!
Highlights
- End-to-end workflow for designing wireless systems using MATLAB and Simulink ‑to‑end workflow for designing wireless systems using MATLAB and Simulink
- Hands-on sessions on fixed-point conversion, hardware optimization, and HDL code generation, FPGA-in-the-loop (FIL) and hardware accelerated verification techniques
- Technical talks and expert sessions on wireless systems and HDL design delivered by distinguished academicians, scientist from SAC-ISRO, and MathWorks experts.
- Practical demonstration of deploying a wireless transceiver chain on FPGA hardware
- Joint Certificate {SAC ISRO, MathWorks and Adani University} on completion of the 3-day FDP
Who Should Attend
Educators who teach courses related to Wireless Communication and FPGAs, eager to adopt MATLAB and Simulink across UG and PG courses, focused on identifying industry-aligned and collaborative research opportunities, and aligning faculty-led projects with practical engineering workflows.
About the Presenter
- Dr. Deepak Mishra, Head & Sci/Eng -G, Satnav Payload Electronics Division, SAC(ISRO), Ahmedabad
- Prof. Dhaval Pujara, Provost (Vice Chancellor), Adani University
- Mr. Chandan Pramanik, Director-Education, MathWorks
- Dr. Praful Pai, Academic Discipline Manager, MathWorks
- Dr. Anand Mukhopadhyay, Senior Engineer, Education, MathWorks
- Dr. Saumya Chaturvedi, Engineer, Education, MathWorks
- Guest Speaker
Agenda
| Time | Day 1 Course Orientation and Foundations of Wireless Communication |
Day 2 Modulation Techniques & Performance Analysis |
Day 3 Advanced Modulation & Error Correction |
Morning Session I (9:30-11am) |
Inaugural Keynote - Overview of Collaboration - Importance of the FDP Session [Speakers: Mr. Chandan Pramanik, Prof. Dhaval Pujara, Dr. Deepak Mishra, Guest Speaker] |
Receiver Design Hands on: - Synchronization, CFO, Channel Estimation, Equalization in MATLAB/Simulink. [Speaker: Dr. Saumya Chaturvedi] |
Software Defined Radios for Wireless Prototyping - using SDRs with MATLAB [Speaker: Dr. Praful Pai] |
|
Overview of Workflow of Wireless System Development/ ISRO Case Study – Navigation and System Level Design [Speaker: Dr. Deepak Mishra] |
|
|
BREAK (15 min) |
BREAK (15 min) |
BREAK (15 min) |
|
Morning Session II (11:15am – 12:45pm) |
Refresher - Wireless System Design Hands on: - MATLAB for Digital Modulation - Simulink for Digital Modulation - BER Analysis across Modulation Schemes - Overview of FPGA/SoCs for Wireless Communications [Speaker: Dr. Praful Pai] |
Introduction to HDL Code Generation for Wireless Communications Hands on: - MATLAB/Simulink for HDL - Verifying Development Environment - Hands-on - HDL Code Generation with MATLAB [Speaker: Dr. Anand Mukhopadhyay] |
Receiver Design Hands-on: - HDL Code Generation Synchronization and Receiver Design [Speakers: Dr. Saumya Chaturvedi, and Dr. Anand Mukhopadhyay] |
LUNCH |
LUNCH |
LUNCH |
|
Afternoon Session I (2:00 PM - 3:30 PM) |
Discussion on Course Rollout (15 min) |
Discussion on Course Rollout (15 min) |
Discussion on Course Rollout (15 min) |
Principles of OFDM and Implementation - OFDM Modeling and Simulation, Design OFDM transmitter/receiver in Simulink. - Overview of FPGA/SoCs for Wireless Communications [Speaker: Dr. Saumya Chaturvedi] |
Modulation Schemes: - HDL Code Generation for Communication application (Modulation/Demodulation) [Speaker: Dr. Anand Mukhopadhyay] |
Accelerating Wireless Simulations Hands on: - Accelerate Communications System Simulation Using FPGA-in-the-Loop - MATLAB & Simulink [Speaker: Dr. Anand Mukhopadhyay] |
|
BREAK (15 min) |
BREAK (15 min) |
BREAK (15 min) |
|
Afternoon Session II (3:45 PM - 5:00 PM) |
Introduction to HDL Code Generation for Wireless Communications Hands on: - MATLAB/Simulink for HDL - Verifying Development Environment - Hands-on - HDL Code Generation with MATLAB [Speaker: Dr. Anand Mukhopadhyay] |
Introduction to HDL Verification for Wireless Communications
[Speaker: Dr. Anand Mukhopadhyay] |
CONTINUED… [Speaker: Dr. Anand Mukhopadhyay] |
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