![photo](/responsive_image/150/150/0/0/0/cache/matlabcentral/profiles/15938784_1565430330871_DEF.jpg)
Youssef Abdelsalam
Followers: 0 Following: 0
Statistics
5 Questions
0 Answers
RANK
86 531
of 293 595
REPUTATION
0
CONTRIBUTIONS
5 Questions
0 Answers
ANSWER ACCEPTANCE
60.0%
VOTES RECEIVED
0
RANK
of 20 050
REPUTATION
N/A
AVERAGE RATING
0.00
CONTRIBUTIONS
0 Files
DOWNLOADS
0
ALL TIME DOWNLOADS
0
RANK
of 149 446
CONTRIBUTIONS
0 Problems
0 Solutions
SCORE
0
NUMBER OF BADGES
0
CONTRIBUTIONS
0 Posts
CONTRIBUTIONS
0 Public Channels
AVERAGE RATING
CONTRIBUTIONS
0 Highlights
AVERAGE NO. OF LIKES
Feeds
Question
How to switch to visualize the output of FFT HDL Optimized in the frequency domain ?
So i just implemented the FFT HDL Optimized and a peak finder with index in Simulink in order to generate HDL code. When i simu...
ungefär 3 år ago | 1 answer | 0
1
answerQuestion
Why is the output of the FFT HDL Optimized block zeros in Vivado's Simulation ?
I recently connected the FFT Block in Simulink to in and out ports so i can generate its HDL Code and implement it in Vivado. A...
ungefär 3 år ago | 1 answer | 0
1
answerQuestion
How to implement a real-time fft for FPGA with matlab or simulink ?
I already know that there is a FFT HDL Optimized Block in Simulink that can be used to generate HDL Code for later on FPGA imple...
ungefär 3 år ago | 1 answer | 0
1
answerQuestion
How to store the output of a repeating function (Matlab Function Block Simulink) ?
I was trying out the Self guided tutorial to implement a hardware friendly peak-finder. (https://www.mathworks.com/matlabcentral...
ungefär 3 år ago | 3 answers | 0
3
answersQuestion
How do i design a synthesizable FFT with Simulink or Matlab for later on FPGA Implementation ?
I need to take an analog signal, put it through an ADC (1MSPS, 20-Bit) and then transform it on an FPGA to the frequency domain ...
ungefär 3 år ago | 1 answer | 0