How to set the 4 Rx channel of USRP X310

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Hi,
I did not find how to set my USRP X310 with 4 Rx channels. It runs well with 2 channels but I was unable to go to 4.
My X310 includes 2 Twin Rx boards having 2 Rx channels for each board (see the config below).
The X310 has only one IP address..
Thank you
JJ
>> findsdru
Checking radio connections...
Win32; Microsoft Visual C++ version 14.1; Boost_106501; UHD_3.13.1.0-vendor
---------- see libuhd version information above this line ----------
ans =
struct with fields:
Platform: 'X310'
IPAddress: '192.168.10.2'
SerialNum: '3192B92'
Status: 'Success'
>> probesdru
ans =
'[INFO] [UHD] Win32; Microsoft Visual C++ version 14.1; Boost_106501; UHD_3.13.1.0-vendor
[INFO] [X300] X300 initialization sequence...
[INFO] [X300] Maximum frame size: 1472 bytes.
[INFO] [X300] Radio 1x clock: 200 MHz
[INFO] [GPS] Found an internal GPSDO: LC_XO, Firmware Rev 0.929b
[WARNING] [UDP] The MTU (1472) is larger than the FastSendDatagramThreshold (1024)!
This will negatively affect the transmit performance.
See the transport application notes for more detail.
[INFO] [0/DmaFIFO_0] Initializing block control (NOC ID: 0xF1F0D00000000000)
[INFO] [0/DmaFIFO_0] BIST passed (Throughput: 1308 MB/s)
[INFO] [0/DmaFIFO_0] BIST passed (Throughput: 1298 MB/s)
[INFO] [0/Radio_0] Initializing block control (NOC ID: 0x12AD100000000001)
[INFO] [0/Radio_1] Initializing block control (NOC ID: 0x12AD100000000001)
[INFO] [0/DDC_0] Initializing block control (NOC ID: 0xDDC0000000000000)
[INFO] [0/DDC_1] Initializing block control (NOC ID: 0xDDC0000000000000)
[INFO] [0/DUC_0] Initializing block control (NOC ID: 0xD0C0000000000000)
[INFO] [0/DUC_1] Initializing block control (NOC ID: 0xD0C0000000000000)
[WARNING] [X300] Cannot update master clock rate! X300 Series does not allow changing the clock rate during runtime.
_____________________________________________________
/
| Device: X-Series Device
| _____________________________________________________
| /
| | Mboard: X310
| | revision: 11
| | revision_compat: 7
| | product: 30960
| | mac-addr0: 00:80:2f:26:07:52
| | mac-addr1: 00:80:2f:26:07:53
| | gateway: 192.168.10.1
| | ip-addr0: 192.168.10.2
| | subnet0: 255.255.255.0
| | ip-addr1: 192.168.20.2
| | subnet1: 255.255.255.0
| | ip-addr2: 192.168.30.2
| | subnet2: 255.255.255.0
| | ip-addr3: 192.168.40.2
| | subnet3: 255.255.255.0
| | serial: 3192B92
| | FW Version: 6.0
| | FPGA Version: 35.1
| | FPGA git hash: d0360f7
| | RFNoC capable: Yes
| |
| | Time sources: internal, external, gpsdo
| | Clock sources: internal, external, gpsdo
| | Sensors: gps_gpgga, gps_gprmc, gps_time, gps_locked, gps_servo, ref_locked
| | _____________________________________________________
| | /
| | | RX Dboard: A
| | | ID: TwinRX Rev C (0x0095)
| | | Serial: 3193709
| | | _____________________________________________________
| | | /
| | | | RX Frontend: 0
| | | | Name: TwinRX RX0
| | | | Antennas: RX1, RX2
| | | | Sensors: lo_locked
| | | | Freq range: 10.000 to 6000.000 MHz
| | | | Gain range all: 0.0 to 93.0 step 1.0 dB
| | | | Bandwidth range: 80000000.0 to 80000000.0 step 0.0 Hz
| | | | Connection Type: II
| | | | Uses LO offset: No
| | | _____________________________________________________
| | | /
| | | | RX Frontend: 1
| | | | Name: TwinRX RX1
| | | | Antennas: RX1, RX2
| | | | Sensors: lo_locked
| | | | Freq range: 10.000 to 6000.000 MHz
| | | | Gain range all: 0.0 to 93.0 step 1.0 dB
| | | | Bandwidth range: 80000000.0 to 80000000.0 step 0.0 Hz
| | | | Connection Type: QQ
| | | | Uses LO offset: No
| | | _____________________________________________________
| | | /
| | | | RX Codec: A
| | | | Name: ads62p48
| | | | Gain range digital: 0.0 to 6.0 step 0.5 dB
| | _____________________________________________________
| | /
| | | RX Dboard: B
| | | ID: TwinRX Rev C (0x0095)
| | | Serial: 3193707
| | | _____________________________________________________
| | | /
| | | | RX Frontend: 0
| | | | Name: TwinRX RX0
| | | | Antennas: RX1, RX2
| | | | Sensors: lo_locked
| | | | Freq range: 10.000 to 6000.000 MHz
| | | | Gain range all: 0.0 to 93.0 step 1.0 dB
| | | | Bandwidth range: 80000000.0 to 80000000.0 step 0.0 Hz
| | | | Connection Type: II
| | | | Uses LO offset: No
| | | _____________________________________________________
| | | /
| | | | RX Frontend: 1
| | | | Name: TwinRX RX1
| | | | Antennas: RX1, RX2
| | | | Sensors: lo_locked
| | | | Freq range: 10.000 to 6000.000 MHz
| | | | Gain range all: 0.0 to 93.0 step 1.0 dB
| | | | Bandwidth range: 80000000.0 to 80000000.0 step 0.0 Hz
| | | | Connection Type: QQ
| | | | Uses LO offset: No
| | | _____________________________________________________
| | | /
| | | | RX Codec: B
| | | | Name: ads62p48
| | | | Gain range digital: 0.0 to 6.0 step 0.5 dB
| | _____________________________________________________
| | /
| | | TX Dboard: A
| | | ID: Unknown (0x0094)
| | | Serial: 3193709
| | | _____________________________________________________
| | | /
| | | | TX Frontend: 0
| | | | Name: Unknown (0x0094) - 0
| | | | Antennas:
| | | | Sensors:
| | | | Freq range: 0.000 to 0.000 MHz
| | | | Gain Elements: None
| | | | Bandwidth range: 0.0 to 0.0 step 0.0 Hz
| | | | Connection Type: IQ
| | | | Uses LO offset: No
| | | _____________________________________________________
| | | /
| | | | TX Codec: A
| | | | Name: ad9146
| | | | Gain Elements: None
| | _____________________________________________________
| | /
| | | TX Dboard: B
| | | ID: Unknown (0x0094)
| | | Serial: 3193707
| | | _____________________________________________________
| | | /
| | | | TX Frontend: 0
| | | | Name: Unknown (0x0094) - 0
| | | | Antennas:
| | | | Sensors:
| | | | Freq range: 0.000 to 0.000 MHz
| | | | Gain Elements: None
| | | | Bandwidth range: 0.0 to 0.0 step 0.0 Hz
| | | | Connection Type: IQ
| | | | Uses LO offset: No
| | | _____________________________________________________
| | | /
| | | | TX Codec: B
| | | | Name: ad9146
| | | | Gain Elements: None
| | _____________________________________________________
| | /
| | | RFNoC blocks on this device:
| | |
| | | * DmaFIFO_0
| | | * Radio_0
| | | * Radio_1
| | | * DDC_0
| | | * DDC_1
| | | * DUC_0
| | | * DUC_1

Accepted Answer

Karunya Choppara
Karunya Choppara on 14 Apr 2020
The 4 channel support for TwinRx daughterboard with X300 and X310 is enabled in R2020a release.
  4 Comments
Papatoux
Papatoux on 28 Apr 2020
Hi Karunya,
Yes, the init time and data acquisition time are a huge issue. It is very heavy to use USRP + Matlab with this timing.
Do you have a delivery time for a solution ?
How can I be informed ?
Best regards and thank you.
JJ
Karunya Choppara
Karunya Choppara on 29 Apr 2020
Hi JJ
The information about new features/capabilities for every release, will be updated on the release notes.

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