hw/sw Co-Design Workflow and UDP communication between Zynq zedboard and host computer
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imane RGUIB
on 26 Feb 2019
Edited: Steve Kuznicki
on 28 Feb 2019
Hello everyone, I need help please, I'm trying to perform HW/SW Co-design for a zedboard. I have this simulink model:![model.PNG](https://www.mathworks.com/matlabcentral/answers/uploaded_files/205950/model.png)
![model.PNG](https://www.mathworks.com/matlabcentral/answers/uploaded_files/205950/model.png)
The subsystem SlaveI2C is the hardware subsystem I implement on the programmable logic, using the IP Core generation in the HDL Workflow Advisor. while the UDP send blocks need to run in the ARM Processor I guess, since these blocks are eligible for C/C++ Code generation only and don't support HDL code generation.
I set my target interfaces as follows:
![interfaces.PNG](https://www.mathworks.com/matlabcentral/answers/uploaded_files/205951/interfaces.png)
At the end of the workflow I have this software interface model: I'm not sure how to generate code for the ARM processor part: should I do it by clicking the "deploy to hardware" button, or by running the model in external mode?
![sw interface model.PNG](https://www.mathworks.com/matlabcentral/answers/uploaded_files/205952/sw%20interface%20model.png)
The model in the Zedboard (which is a custom I2C Slave) communicates with an Arduino I2C master, everything related to the I2C communication works great (I read and write to the slave, and results shown through the Arduino serial monitor are great).
The problem is I want the following simulink model which runs on the host computer, to receive data sent by the Zedboard using UDP Ethernet protocol: ![udp client.PNG](https://www.mathworks.com/matlabcentral/answers/uploaded_files/205953/udp%20client.png)
![udp client.PNG](https://www.mathworks.com/matlabcentral/answers/uploaded_files/205953/udp%20client.png)
I set the remote IP addresses and ports for the "Zynq send udp blocks", as well as the "host udp receive blocks" but I don't receive anything in these display blocks. Could it be a frequency problem, since the hardware runs at 50MHz and the simulink model on the host computer is much slower, I guess? Or maybe I don't quite undersatnd how to partition model into sw and hw parts, generate codes for their respective parts and make them co-habitate in the same SoC!
Can you please help me with any input, it would be much appreciated, Thank you.
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Steve Kuznicki
on 28 Feb 2019
Edited: Steve Kuznicki
on 28 Feb 2019
You are heading in the right direction here.
I think you should consolidate your UDP Send/Recv blocks so there are only one each in each model.
You will want to take the "Software" model and "deploy to hardware" - place in "Normal" mode and choose "Build, Deploy, Run". Make sure that your sample rate is no more than 5-10kHz. You can't do much more than that on the ARM. Also make sure that you can successfully "ping" from the Host to ARM and from ARM to Host. Sometimes there are anti-virus software running on the Host which blocks this. Your "host" simulink model will run (Simulate) as fast as it can so you should be ok there.
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