Simulation not repeated correctly in a FOR loop

I have been trying to re-create a graph of I_ds / V_ds for a transistor NMOS showing multiple curves while changing the gate tension V_gs. The code is pretty straight forward, as i am very new to MATLAB and i was experimenting. I used Simscape's blocks as my circuit core in simulink, and the signal goes on correctly as predicted. However, once i repeat the simulation in a FOR cicle in order to plot the multiple curves i get the same results over and over: the curvers are overlapping perfectly. I assume the block DS Voltage Source has some problems in reading the Vg variable from the code, even tho it shows the correct value in simulink. I tried to change it for a Controlled Voltage Source block and add a Constant, a Ramp with 0 slope or a From Workspace block but i keep getting the same results.

Any idea on how i can solve this? thanks in advance.

Answer 1

[Shivam Gothi]

Hello @Daniele Bruno,

I understand that you want to run the simulation multiple times for different values of gate-source voltage (Vgs). For some reasons, you are not able to get the expected output.

I simulated the Simulink model attached by you and was able to reproduce the issue. I am suggesting some small changes to be made in the code attached by you in the “Codice.m” file. They are as follows:

• The output of the “sim” command should be saved in a variable “out”
• Use “hold on” command to hold previous plots on the same figure.
• Use proper commands to show legends in the plot.

I have also attached the modified MAT file. I executed it and found it to be working properly. The below given figure shows the plot of “Vds” vs “Ids” for Vgs=[4 5] generated by running the code “Codice.m”

I hope it answers your question!

[Shivam Gothi]

Hello @Daniele Bruno,

Sorry, somehow I forgot to attach the "codice.m" file. I have edited the answer and attached it again.

[Daniele Bruno]

Thanks a lot, i think i got the grasp of it now.