- AXI Manager - MATLAB & Simulink (mathworks.com)
- Access FPGA External Memory Using AXI Manager - MATLAB & Simulink Example (mathworks.com)
Capture ADC data from Zynq FPGA into PC in real time
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Rouzbeh Molaei Imenabadi
on 30 Oct 2023
Commented: Rouzbeh Molaei Imenabadi
on 6 Nov 2023
So I have a project where I need to send data processed ADC data from Zynq to PC and then display it in Matlab. The communication is one-directional, coming in chunks of approx. 1.5MB. I have the ZCU104 board and the data is therefore stored in the DDR memory. I don't want to spend too much time with the Zynq-PC interface as it is not the primary goal of my project.
What is your advice? Do you know of some good design examples that I could modify?
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Accepted Answer
SANKALP DEV
on 6 Nov 2023
Hello Rouzbeh,
I understand that you are seeking assistance with the task of sending processed ADC data from a Zynq board to a PC and displaying it in MATLAB.
One effective method to achieve this is by utilizing MATLAB's AXI Manager, which facilitates access to the FPGA's internal memory. To implement this approach, it is crucial to include the AXI Manager IP in your FPGA design.
For more detailed information and guidance, I recommend referring to the following MATLAB documentation resources:
These documentations also include practical examples that can significantly aid you in progressing with your projects.
Hope this helps you.
Regards
Sankalp dev
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