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Parameter Configuration for Analysis

Parameter configuration allows Simulink® Design Verifier™ to assess the impact of parameter ranges along with the default value during the analysis. Consider an example model that illustrates the impact of parameter configuration on analysis outcomes. The model features a switch block with its control port conditioned on > 0 and is influenced by a calibration parameter K that has a value of 0 in the base workspace.

Switch block with a control port.

The table below showcases how the analysis results vary with parameter configurations:

Parameter K with value 0 in base workspaceNo Parameter Configuration specified Parameter Configuration specified with K in interval [-1,1]
Analysis result
  • Control port with value greater than 0 is reported as dead logic.

  • Control port with value lesser than 0 is reported as active logic.

  • No dead logic is reported.

  • The analysis engine selects the value 1 to satisfy the condition of the control port being greater than 0.

Test cases Parameters retain same value as specified in base workspace for all test cases. Parameter values are reported along with input values, and they may vary from one test case to another.

The figure below shows the three basic steps involved in parameter configuration:

Flowchart to show basic steps for parameter configuration. This includes design model, parameter selection, specifying minimum or maximum constraints and analysis.

  1. Select Parameters: Parameters are defined using Simulink.Parameter variables for calibration. You have the option to either select the parameters manually to configure or let Simulink Design Verifier automatically detect and configure these parameters. For more information, see Ways to Configure Parameter Configuration.

  2. Specify Ranges: You can define ranges (maximum or minimum values) for the selected parameters. For a Simulink.Parameter variable, the default range is determined by the maximum or minimum values.

  3. Run Analysis: The Simulink Design Verifier analysis uses these values to produce the results. The generated test cases include the parameter values in addition to the necessary inputs to achieve the desired coverage.

Limitations for Parameter Configurations

The following table illustrates the cases where Simulink Design Verifier does not support specifying the parameter configuration:

Parameters Based onLimitations

Location

Simulink Design Verifier does not support parameter configuration for parameters that are:

  • Read-only in the generated code.

  • Defined as MATLAB® variables in Data Dictionary.

  • Defined in the Model Workspace.

  • Used by model specific parameters.

  • Used in both design model and observer model

Data types

Simulink Design Verifier does not support parameter configuration for parameters that are:

  • Not of the numeric, logical, or fixed-point type.

  • With complex values.

  • Specified by using Simulink.ValueType object.

  • Used in Array of Buses.

  • Converted to fixed point in the model. If your model references a base workspace parameter whose data type is auto, single, or double, and the model converts that parameter to a fixed-point data type, you must define the constraints for that parameter according to its fixed-point type.

Block types

Simulink Design Verifier does not support parameter configuration for parameters from these blocks:

  • Variant blocks.

  • Inport and Outport blocks

  • Lookup, Lookup_n-D, LookupNDDirect, Lookup Table Dynamic, and Pre-lookup table blocks.

  • Interpolation_n-D block.

  • Saturation block.

  • Selector block.

  • For Iterator block.

  • Switch case block.

See Also

Related Topics