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Troubleshoot Validation Errors in Simscape Hardware-in-the-Loop Workflow

You can generate an HDL implementation model from a Simscape™ model by using the Simscape HDL Workflow Advisor. The HDL implementation model represents the Simscape algorithm by using Simulink® blocks that are compatible for HDL code generation for the specified target hardware settings. In the State-space conversion step, the Advisor extracts state-space data (the values of states or inputs) from the original Simscape model. In this step, the corresponding state-space matrices encountered during simulation are cached. The HDL implementation model uses the cached state-space data to calculate the updated state at each time step. If the HDL implementation model encounters states that are not cached during the simulation, a validation error occurs. Because of this, the values of states or inputs in the HDL implementation model differ from the original Simscape model.

In this topic, you will learn:

  • What causes validation errors.

  • How to address validation errors in HDL implementation models.

Consider, for example, an HDL implementation model that has four Boolean modes m1,m2, m3, and m4 with these configurations cached during simulation:


Suppose that the HDL implementation model encounters a state with this mode configuration:


Encountering this state may result in a validation mismatch because ConfigurationX was not cached during the simulation. As a result, the output of the HDL implementation model may not match the results from the original Simscape model. In some cases, it might lead to errors and the model might produce invalid results.

You can see the validation error in Vienna Rectifier Example model when you generate the HDL implementation model with Floating-point precision selected as Single. The Diagnostic Viewer displays the assertion as warnings on simulating the HDL implementation model.

Assertion in Vienna Rectifier model

Causes of Validation Errors

When a validation error occurs in the HDL implementation model, the Diagnostic Viewer displays an assertion. These are some primary causes of validation errors.

Insufficient Precision

In the HDL Implementation model, you can select either single- or double-precision data type when performing matrix computations. When you select single precision for numerical calculations, precision losses can result. For sufficiently stiff models, even small variances caused by this precision loss can lead to validation errors if the HDL implementation model encounters new states that were not cached during Simscape simulation.

Numerical stiffness can make models prone to precision-related error. You can sometimes reduce the numerical stiffness by making changes to the model parameters (for example, the value of a capacitor). For more information, see Reduce Numerical Stiffness (Simscape).

You can resolve a validation error resulting from insufficient precision by generating an HDL implementation model with higher precision. To generate such a model by using the Simscape HDL Workflow Advisor, you can select either the Single coefficient, double computation or Double precision option under Floating-point precision in the Generate implementation model task window.


Models containing trigonometric functions are particularly prone to error due to precision loss. Models that use trigonometric functions may still experience validation errors even when using double precision.

Inputs to HDL Implementation Model Differ from Cached Data

The HDL implementation model relies on a set of cached state-space matrices encountered during the original Simscape model simulation. These matrices sometimes depend on the Simscape network input. When inputs to the HDL implementation model or HDL algorithm on the FPGA differ from the original desktop simulation data, the corresponding state-space data is not available and validation errors can occur. To cache the necessary data during desktop simulation in Simscape, provide the full range of expected inputs to the Simscape model.

To avoid this type of validation error, you can:

  • Run the Simscape simulation up to the same Simulation Stop Time as is intended for the HDL implementation model. Do not extend the simulation run-time of the HDL implementation model significantly past the original Simscape run-time. This captures all input configurations during the Extract discrete equations stage of the workflow.

  • Provide inputs to the Simscape model that cover the possible states for the model and the range of possible operating simulation inputs (for example, both 0 and 1 gate inputs, the full range of expected voltages for a controlled voltage source).

Inappropriate Solver Settings

The choice of solver settings can also lead to validation errors.

To match the behavior of a fixed-cost discrete HDL implementation model, in the Block Properties dialog box of the Solver Configuration (Simscape) block, select Use fixed-cost runtime consistency iterations. Selecting Use local solver automatically selects Use fixed-cost runtime consistency iterations, because these are the recommended settings for real-time and hardware-in-the-loop (HIL) simulations.

Make sure that you use enough solver iterations for convergence. If the Simscape model does not use enough iterations for convergence, it may produce inaccurate results. The simscape.getLocalSolverFixedCostInfo (Simscape) function reports the number of iterations required for fixed-step, fixed-cost simulation. The MaxIterations field of the function returns -1 if the simulation fails to converge.

Data Transfer Issues

The Rate Transition block transfers data from the output of a block operating at one rate to the input of a block operating at a different rate. The behavior of the Rate Transition block depends on multiple model configuration parameters. If your model executes in multitasking mode with Ensure data integrity during data transfer disabled, then Rate Transition blocks introduce delays. Added delays at the input ports of the HDL algorithm can introduce validation errors for models with multiple solver iterations.

To prevent the error, you must use the single-tasking mode of execution for your model. To enable single-tasking mode, in the Configuration Parameters dialog box, under Solvers > Solver details > Tasking and sample time options, clear the Treat each discrete rate as a separate task check box. By default, the Ensure data integrity during data transfer check box is disabled for Simscape HIL Workflow simulations. These settings ensure data integrity during data transfer while minimizing the latency in the HDL algorithm inside HDL implementation model.

New rates may be introduced in the HDL implementation models that are not a part of the original Simscape model. You can make all control systems or inputs to the Simscape plant behave equivalently across both models by manually implementing the rate transitions. To implement the rate transitions manually:

  • Disable the model configuration parameter Automatically handle rate transition for data transfer and add Rate Transition blocks as needed. To learn more, see Automatically handle rate transition for data transfer.

  • Enable the warning for single-task data transfer to identify any places that require manual rate transition handling. To enable the warning, in the Configuration Parameters dialog box, under Diagnostics > Sample Time, set the value of the Single task data transfer parameter to warning. For more information see, Single task data transfer.

These troubleshooting measures may involve significant tradeoff between accuracy and efficiency. Some of the techniques mentioned above may result in longer simulation run-times or take up more space on the FPGA (if you use double precision instead of single precision).

If your model achieves the desired accuracy without any of the suggested modifications, then you do not need to update your model with any of these settings. However, if your model fails to achieve acceptable accuracy or encounters validation errors, you might be able to improve your model using the suggested fixes.

See Also

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