Developing new FPGA and ASIC designs involves implementing new algorithms, which presents challenges for verification for algorithm developers, hardware designers, and verification engineers.
This ebook explores different aspects of hardware design verification and shows you can use MATLAB® and Simulink® to reduce development effort and improve quality by:
- Performing more verification at higher levels of abstraction
- Reusing testbenches from algorithm development through hardware testing on FPGA development boards
- Generating testbench components from MATLAB and Simulink for use in production verification environments
- Performing top-down design and verification of analog/mixed-signal designs
- Supporting functional safety requirements though workflows supporting DO-254 and ISO 26262 certification processes