Monitor Signals Without Adding Signal Lines with Observer Blocks

To verify a design, you may need to access some signals buried deep inside a model hierarchy, but we don’t want to modify the design or its interface just for testing purposes.

Observers allow you to you monitor signals of your model while preserving the design’s dynamic response and interfaces. 

This test harness is testing a controller.

It has a Test Sequence block to drive the input scenarios and a Test Assessment block that is verifying the behavior of the controller.

The Test Assessment block needs access to five signals—two are accessible at the level, but the other three are inside the controller. 

Instead of modifying the controller to bring the signals to the Assessment, I will create an Observer model by simply selecting the input signals.

The Observer model is created with two Observer Ports. 

Another way to add signals is using the Observer Dialog.  

I will the select the signals inside the controller for observing and additional Observer Ports are added. 

Now that we have all the signals we need, let’s move the Test Assessment block inside of the Observer and connect it.   

Back in the Test Harness, you can see that the Observer Reference block was added to it. 

We will cut the Test Assessment block from the harness and paste it into the Observer model.

Finally, we will connect the Observer Ports to the inputs of the Test Assessment.

Now, we can simulate our test harness and Observer models. We don’t need to add any signals to connect the Observer Ports. 

After Simulation ends, we can take a look at the pass/fail results of the assessments in the Simulink Data Inspector.

With Observers, you can separate verification logic from the design and access any signal, at any hierarchy, without modifying the interfaces and without impacting the systems dynamic response. It helps avoid cluttering the model with additional signals required only for testing.


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