This three-day course will review DSP fundamentals from the perspective of implementation within the FPGA fabric. Particular emphasis will be given to highlighting the cost, with respect to both resources and performance, associated with the implementation of various DSP techniques and algorithms. Topics include:
|Day 1 of 3|
|Introduction to DSP FPGA Hardware||
Objective: Provide introduction to DSP and FPGA. Understand general FPGA architecture and why FPGAs are uniquely suited to the implementation of DSP algorithms.
|Linear Systems DSP Algorithm Review||
Objective: Review fundamental concepts of sampling theorem, quantization, Fourier analysis and digital filter design.
Objective: Explore different Xilinx FPGA families and architectures. Provide introduction to Spartan 3 and Virtex-5 FPGAs.
|FPGA elements for DSP algorithms||
Objective: Understand DSP slices, clocking resources and power consumption.
|DSP Arithmetic Essentials||
Objective: Understand fixed point binary arithmetic. Map arithmetic operations to Xilinx FPGA hardware.
|Signal Flow Graph (SFG) Techniques||
Objective: Review the representation of DSP algorithms using signal flow graph. Use the Cut Set method to improve timing performance. Implement parallel and serial FIR filters.
|Day 2 of 3|
|Frequency Domain Processing||
Objective: Discuss the theory and FPGA implementation of the Fast Fourier Transform.
|Multirate Signal Processing for FPGAs||
Objective: Develop polyphase structure for efficient implementation of multirate filters. Use CIC filter for interpolation and decimation.
Objective: Introduce CORDIC algorithm for calculation of various trigonometric functions.
|Day 3 of 3|
|Adaptive DSP Algorithms and Applications||
Objective: Introduce LMS algorithm in adaptive signal processing. Illustrate QR algorithm as a Recursive Least Squares (RLS) technique and why it is particularly suited to FPGA implementation.
|DSP Enabled Communications and FPGAs||
Objective: Review quadrature modulation and pulse-shaping. Discuss implementation of numerically controlled oscillators.
|Timing and Synchronisation Issues||
Objective: Cover symbol timing recovery, carrier phase recovery, carrier frequency recovery and frame synchronization.
See if you are eligible for discounted pricing for academic users.
When you register for one of these courses, you can rely on the fact that it won't be canceled or rescheduled for any reason.
09 aug 2017-
11 aug 2017
|US, District of Columbia, Washington||English||USD 2 250|
23 aug 2017-
25 aug 2017
|US, California, San Diego||English||USD 2 250|
13 sep 2017-
15 sep 2017
|US, Texas, Austin||English||USD 2 250|
04 okt 2017-
06 okt 2017
|US, California, Los Angeles (Torrance)||English||USD 2 250|
28 nov 2017-
30 nov 2017
|Germany, München (Ismaning)||German||EUR 2 100|
29 nov 2017-
01 dec 2017
|US, Massachusetts, Natick||English||USD 2 250|
The pricing applies for purchase and use in United States, For pricing in other regions Contact Sales. The product price does not include sales, use, excise, value-added, or other taxes. Any applicable taxes, duties, levies, assessments and governmental charges payable in connection with this purchase will be assessed on the order. Refer to Training Policies for more information
You are eligible for discounted academic pricing when you use MATLAB and Simulink for teaching, academic research, or for meeting course requirements at a degree granting institution.
You are not eligible for academic pricing when you use MATLAB and Simulink at a commercial or government lab, or for other commercial or industrial purposes.
You can also select a location from the following list: