Xilinx System Generator for DSP

Simulink blockset for bit- and cycle-accurate simulation and code generation for Xilinx FPGAs

Description

The Xilinx System Generator™ for DSP is a plug-in to Simulink that enables designers to develop high-performance DSP systems for Xilinx FPGAs. Designers can design and simulate a system using MATLAB, Simulink, and Xilinx library of bit/cycle-true models. The tool will then automatically generate synthesizable Hardware Description Language (HDL) code mapped to Xilinx pre-optimized algorithms. This HDL design can then be synthesized for implementation on Xilinx FPGAs and All Programmable SoCs. As a result, designers can define an abstract representation of a system-level design and easily transform this single source code into a gate-level representation. Additionally, it provides automatic generation of a HDL testbench, which enables design verification upon implementation.

More about Programming Xilinx FPGAs using Simulink, HDL Coder and System Generator

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Read the following user stories:

How Research Engineers use MathWorks and Xilinx products User story.

How BAE Systems uses MathWorks and Xilinx products User story.

Explore selected hardware support for Xilinx products.

Xilinx, Inc.

2100 Logic Dr
San Jose, CA 95124-3450
UNITED STATES
Tel: 408-559-7778
Fax: 408-626-6440
logicore@xilinx.com
http://xilinx.com

Required Products

Platforms

  • Windows

Support

  • E-mail
  • System integration
  • Telephone

Product Type

  • Embedded Hardware - MCU, DSP, FPGA

Tasks

  • Data Acquisition or Import
  • Digital Signal Processing
  • Image Processing and Computer Vision
  • Real-Time Systems
  • Motor Control

Industries

  • Communication Infrastructure
  • Consumer Electronics
  • Industrial Automation and Machinery