XILINXBRAM - Xilinx FPGA Block RAM Init

Matlab code for Xilinx FPGA (Spartan, Virtex) 18k block RAM declaration using VHDL or Verilog

Use xilinxbram.m and xilinxbraminit.m functions to generate VHDL or Verilog fraction of code to initialize Xilinx FPGA (Spartan, Virtex) 18k block RAM.
Recent revision is also available here: http://radio.feld.cvut.cz/personal/matejka/wiki/doku.php?id=root:en:projects