After you design and validate a pixel-streaming video processing algorithm in Simulink®, you can target the design to the FPGA on the Zynq board, and generate embedded ARM® code that interacts with the FPGA. You can route the video data to the ARM processor, and control AXI-Lite registers connected to the FPGA control logic.
|Video Capture (software interface)||Capture video to ARM processor on a Zynq-based video system|
|Connect to Zynq hardware|
Get started with a model configured for video processing.
Learn about the video data path through the Zynq board.
FPGA targeting workflow using HDL Workflow Advisor.
This example shows how to select an AXI4-Stream Video interface for your generated FPGA user logic.
Design and deploy algorithms to the ARM processor.
Run Simulink models that interact with the deployed algorithms running on the FPGA.