For an example that shows the Simulink® to HDL hardware-software co-design workflow for the Intel® SoC platform, see hdlcoder_ip_core_tutorial_alterasoc.
The example shows how to:
Set up your Intel SoC hardware and tools.
Generate an HDL IP core for your Simulink design.
Integrate the IP core into an Qsys project and program the Intel SoC hardware.
Generate and build the embedded software, and run it on the ARM® Cortex®-A9 processor.