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Simulation Performance Tips

To enhance the simulation performance of your SoC Blockset™ model, apply these settings to the top model and the referenced models in your SoC design (such as the processor model or FPGA model).

  • When memory accuracy is not required, you can model behavioral memory transactions faster by turning off memory simulation. To do so, open the Memory Channel block mask and clear the Enable memory simulation parameter. For an example that uses this feature, see Accelerate SoC Simulation by Varying Abstraction Levels.

  • Turn on compiler optimization for accelerator mode. Click Hardware Settings on the Simulink® Toolstrip to open the configuration parameters dialog box. Then, select Simulation Target in the left pane, and set Undefined function handling to Filter out.

  • Expand the ... at the bottom. Under Advanced parameters, perform these actions:

    • Set Compiler optimization level to Optimizations on (faster runs). This action turns on compiler optimization for accelerator mode, but it also increases the time of the first ctrl-D to build the library.

    • Select Block reduction.

    • Select Conditional input branch execution.

  • In the configuration parameters, select Code Generation in the left pane. Under Toolchain settings, set Build configuration to Faster Runs.

  • In the left pane, under Code Generation, select Optimization. Set Default parameter behavior to Inlined.

  • To remove signal logging, enter this code at the MATLAB® command prompt.

    mdlsignals = find_system(gcs,'FindAll','on','LookUnderMasks','all', ...
    ph = get_param(mdlsignals,'SrcPortHandle');
    for i=1: length(ph)
  • To disable model animation, right-click the model canvas, and set Animation Speed to None.

  • Set the FPGA and processor model references to accelerator mode. Navigate the model hierarchy to the model reference, right-click the model reference block, and select Block Parameters. Then, in the Block Parameters dialog box, set Simulation mode to Accelerator.

See Also

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