Use Simulink® Real-Time™ and HDL Coder™ to implement Simulink algorithms and configure I/O functionality on Speedgoat Simulink-Programmable I/O modules. For an example that shows the development workflow for FPGA I/O modules, see FPGA Programming and Configuration on Speedgoat Simulink-Programmable I/O Modules (HDL Coder).
When you open the HDL Workflow Advisor in HDL Coder and run the
Simulink Real-Time FPGA I/O workflow, you
Real-Time interface subsystem. The subsystem mask controls the block parameters. Do not
edit the parameters directly. The FPGA I/O board block descriptions are for informational
Simulink-Programmable I/O modules are part of Speedgoat target computer systems. To run the
Simulink Real-Time FPGA
I/O workflow, install the Speedgoat Library and the Speedgoat
HDL Coder Integration Packages. You can then choose the Target
platform and run the workflow to generate a Simulink
Real-Time interface subsystem. To see the documentation for the integration packages,
enter this command at the MATLAB® command
|To learn about||See links|
The integration packages and how you can install them.
Speedgoat I/O modules that are supported with the HDL Workflow Advisor.
Applications and use cases
Supported interfaces for various types of I/O connectivity and protocols as well as fundamental functionality such as PCIe read/write and DMA.
See Supported Interfaces.
Provided examples for all supported I/O modules and functionality
To work with FPGAs in the Simulink Real-Time environment, install:
HDL Coder and Simulink Real-Time.
Xilinx® design tools with specific tool and version listed in HDL Language Support and Supported Third-Party Tools and Hardware (HDL Coder). You must also set up the path to the tool
by using the
hdlsetuptoolpath (HDL Coder)
Speedgoat Library and the Speedgoat HDL Coder Integration Packages.
Speedgoat FPGA I/O module in the Speedgoat target machine.
You can use the workflow in HDL Coder to generate HDL code for your FPGA target device.