Ground

Ground unconnected input port

• 

Libraries:
Simulink / Commonly Used Blocks
Simulink / Sources
HDL Coder / Sources

Description

The Ground block connects to blocks whose input ports do not connect to other blocks. If you run a simulation with blocks that have unconnected input ports, the software issues warnings. Using a Ground block to ground those unconnected blocks can prevent these warnings.

Working with Fixed-Point Data Types

When working with fixed-point data types, there may be instances where the fixed-point data type cannot represent zero exactly. In these cases, the Ground block outputs a nonzero value that is the closest possible value to zero. This behavior applies only to fixed-point data types with nonzero bias. These expressions are examples of fixed-point data types that cannot represent zero:

• fixdt(0, 8, 1, 1) — an unsigned 8-bit type with slope of 1 and bias of 1

• fixdt(1, 8, 6, 3) — a signed 8-bit type with slope of 6 and bias of 3

Working with Enumerated Data Types

When working with enumerated data types, the Ground block outputs the default value of the enumeration. This behavior applies whether:

• The enumeration can represent zero

• The default value of the enumeration is zero

If the enumerated type does not have a default value, the Ground block outputs the first enumeration value in the type definition.

Examples

Integer and Enumerated Data Type Support in the Ground Block

This example shows how to use the Ground block to ground block input ports that have integer and enumerated data types. In top row of this example, the output of the Constant block determines the data type (int8) of the port to which the Ground block is connected. That port determines the output data type of the Ground block, and the Ground block outputs a signal with zero value, and data type int8.

In the bottom row of this example, the Ground block is connected to a port with an enumerated data type. For enumerated data types, the Ground block outputs the default value of the enumeration. This behavior applies whether or not:

• The enumeration can represent zero

• The default value of the enumeration is zero

If the enumerated type does not have a default value, the Ground block outputs the first enumeration value in the type definition.

Fixed-Point Data Type Support in the Ground Block

This example shows how to use the Ground block to ground block input ports that have fixed-point data types. The top row of this example illustrates the Ground block behavior when the fixed-point data type can represent zero. In that case, the Ground block outputs a signal with zero value, and the same fixed-point data type as the port it is connected to.

In the bottom row of this example, the output of the Constant block determines the data type of the port to which the Ground block is connected (fixdt(0,8,1,1)). Because zero cannot be represented exactly by the data type fixdt(0,8,1,1), the Ground block outputs a nonzero value that is the closest possible value to zero (in this case, 1).

Extended Examples

Double Bouncing Ball: Use of Adaptive Zero-Crossing Location

Choose the correct zero-crossing location algorithm, based on the system dynamics. For Zeno dynamic systems, or systems with strong chattering, you can select the adaptive zero-crossing detection algorithm through the Configure pane:

• Open Model

Triggered Subsystems

Model showing triggered subsystems and different types of triggers.

• Open Model

Ports

Output

Port_1 — Ground signal

scalar

The Ground block outputs a scalar signal with zero value, and the same data type as the port to which it connects.

Data Types: single | double | half | int8 | int16 | int32 | int64 | uint8 | uint16 | uint32 | uint64 | string | Boolean | fixed point | enumerated | bus | image

Block Characteristics

Data Types	Boolean | bus | double | enumerated | fixed point | half | integer | single | string
Direct Feedthrough	no
Multidimensional Signals	yes
Variable-Size Signals	no
Zero-Crossing Detection	no

Extended Capabilities

C/C++ Code Generation
Generate C and C++ code using Simulink® Coder™.

HDL Code Generation

Generate VHDL, Verilog and SystemVerilog code for FPGA and ASIC designs using HDL Coder™.

HDL Coder™ provides additional configuration options that affect HDL implementation and synthesized logic.

HDL Architecture

This block has one default HDL architecture.

HDL Block Properties

ConstrainedOutputPipeline	Number of registers to place at the outputs by moving existing delays within your design. Distributed pipelining does not redistribute these registers. The default is 0. For more details, see ConstrainedOutputPipeline (HDL Coder).
OutputPipeline	Number of output pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is 0. For more details, see OutputPipeline (HDL Coder).

Complex Data Support

This block supports code generation for complex signals.

PLC Code Generation
Generate Structured Text code using Simulink® PLC Coder™.

Fixed-Point Conversion
Design and simulate fixed-point systems using Fixed-Point Designer™.

Version History

Introduced before R2006a