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FMA

Single instruction, multiple data (SIMD) code for fused multiply add operations

Since R2024a

Model Configuration Pane: Code Generation / Optimization

Description

The FMA parameter instructs the code generator to generate single instruction, multiple data (SIMD) code for fused multiply add operations.

Dependencies

To use this parameter, you must set:

  • Device vendor to ARM Compatible and Device type to ARM Cortex-A (32-bit) or ARM Cortex-A (64-bit).

  • Leverage target hardware instruction set extensions to a valid instruction set.

Settings

off (default) | on
On

Generates single instruction, multiple data (SIMD) code for fused multiply add operations.

Off

Generates non-parallel for loops for fused multiply add operations.

Recommended Settings

ApplicationSetting
DebuggingNo impact
TraceabilityNo impact
EfficiencyNo impact
Safety precautionNo impact

Programmatic Use

Parameter: InstructionSetFMA
Type: character vector
Value: 'on' | 'off'
Default: 'off'

Version History

Introduced in R2024a