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Oversampling Parameters

This page describes configuration parameters that reside in the Clock Settings section of the HDL Code Generation > Global Settings pane in the Configuration Parameters dialog box. Using these parameters, you can set an oversampling value automatically or manually for your design. HDL Coder™ uses the oversampling value to handle latency in feedback loops and integrate the DUT with a larger system that supplies timing signals to other components in the system at the global oversampling clock.

  • If you are modeling with actual hardware rates, enable the Treat Simulink rates as actual hardware rates parameter to set an oversampling value for your model automatically.

  • If you are modeling with relative rates in Simulink®, set the Oversampling factor parameter to a value greater than 1 to set an oversampling value for your model.

Treat Simulink rates as actual hardware rates

Use this parameter to let HDL Coder automatically set an oversampling value based on your Simulink model rates and the Target Frequency (MHz) parameter value during HDL code generation .

When you select this parameter, you can make changes to your design data and clock rates without manually calculating and updating the oversampling value. For example, select this parameter if you have complex feedback loops with multiple optimizations enabled for your model and you want the fastest data rate possible while allowing the optimizations to perform.

Settings

Default: Off

On

Treat Simulink rates as actual hardware rates and let HDL Coder set an oversampling value automatically. Express your data rate in terms of Simulink model rates and clock rate in terms of the Target Frequency (MHz) parameter. HDL Coder automatically sets an oversampling value based on your data and clock rates during HDL code generation. When you select Treat Simulink rates as actual hardware rates, you cannot change the Oversampling factor parameter.

Off

Do not treat Simulink rates as actual hardware rates. You can use the Oversampling factor parameter to manually specify the oversampling value.

Dependencies

You must set the Target Frequency (MHz) parameter to a target clock rate greater than 0 to select Treat Simulink rates as actual hardware rates.

Command-Line Information

Property: TreatRatesAsHardwareRates
Type: character vector
Value: 'on' | 'off'
Default: 'off'

To set this property, use the functions hdlset_param or makehdl. To view the property value, use the function hdlget_param.

For example, you can use the TreatRatesAsHardwareRates setting when you generate HDL code for the symmetric_fir subsystem inside the sfir_fixed model using either of these methods:

  • Pass the property as an argument to the makehdl function.

    makehdl('sfir_fixed/symmetric_fir', ... 
            'TreatRatesAsHardwareRates','on')
  • Enable the parameter on the model by using hdlset_param, and then generate HDL code by using makehdl.

    hdlset_param('sfir_fixed','TreatRatesAsHardwareRates','on')
    makehdl('sfir_fixed/symmetric_fir')

See Also

Oversampling factor

Use this parameter to manually specify an oversampling value, which is the factor by which the global clock signal is a multiple of the base rate at which the model operates

By default, HDL Coder does not generate a global oversampling clock. To generate a global oversampling clock, specify an integer greater than 1. If you use a multirate DUT, make sure that other rates in the DUT divide evenly into the global oversampling rate.

The global oversampling clock affects only the generated HDL code. It does not affect the simulation behavior of your model.

Settings

Default: 1

Dependencies

  • To enable this parameter, clear Treat Simulink rates as actual hardware rates.

  • If you use multiple clocks, you must set Oversampling factor to 1. If you want to use an oversampling value greater than one, set Clock inputs to Single.

  • If you set Oversampling factor to a value greater than 1, make sure that the clock-rate pipelining optimization is enabled. You can specify this setting in the HDL Code Generation > Target and Optimizations > Pipelining tab.

    Clock-rate pipelining uses the Oversampling factor parameter to convert the slow regions in your model that operate at the base sample rate to the faster clock rate.

Command-Line Information

Property: Oversampling
Type: int
Value: integer greater than or equal to 1
Default: 1

To set this property, use the functions hdlset_param or makehdl. To view the property value, use the function hdlget_param.

For example, you can specify this property when you generate HDL code for the symmetric_fir subsystem inside the sfir_fixed model by using either of these methods:

  • Pass the property as an argument to the makehdl function.

    makehdl('sfir_fixed/symmetric_fir', ... 
            'Oversampling',5)
  • Set the parameter on the model by using hdlset_param, and then generate HDL code by using makehdl.

    hdlset_param('sfir_fixed','Oversampling',5)
    makehdl('sfir_fixed/symmetric_fir')

See Also