Custom IP Core Generation
HDL Coder™ can generate a custom HDL IP core that you can deploy to the Intel® SoC devices. You can integrate the generated IP core into the default system reference design or into your own custom reference design that you register for the board.
- Generate an IP Core for Intel SoC Platform from MATLAB
Generate a custom IP core to target the Altera® Cyclone® V SoC development kit or Arrow® SoC kit development board.
- Generate an IP Core for Intel SoC Platform from Simulink
Generate a custom IP core to target the Altera Cyclone V SoC development kit or Arrow SoC kit development board.
- Custom IP Core Generation
Generate a custom IP core from a model or algorithm using the HDL Workflow Advisor.
- Custom IP Core Report
You generate an HTML custom IP core report by default when you generate a custom IP core.
Resolve timing failures in Build FPGA Bitstream step of IP Core Generation Workflow or Simulink Real-Time FPGA I/O Workflow for Vivado-Based Boards.